Difference between revisions of "CRTC"
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[[Category:Hardware]]__NOTOC__ | [[Category:Hardware]]__NOTOC__ | ||
| − | The 6845 CRTC controls how the display is generated. It is written to with | + | {{PageTitle|6845 CRTC}} |
| − | [[ | + | The 6845 CRTC (Cathode Ray Tube Controller) controls how the display is |
| − | settings. The hardware is directly accessible at &FE00 and &FE01. | + | generated. It is written to with |
| − | + | [[VDU_23#VDU_23.2C0_-_CRTC_register_programming|VDU 23,0]] which also takes | |
| − | + | account of the current *TV and [[VDU_23#VDU_23.2C1_-_Cursor_control|VDU 23,1]] | |
| + | settings. The hardware is directly accessible at &FE00 and &FE01. The | ||
| + | 6845 is used in the BBC, Master and System computers. Other display hardware | ||
| + | is used on the Atom, Electron, and later computers | ||
Most systems without a hardware 6845 CRTC implement setting the cursor state | Most systems without a hardware 6845 CRTC implement setting the cursor state | ||
| Line 42: | Line 45: | ||
* [[CRTC#31|31]] - Register 31 | * [[CRTC#31|31]] - Register 31 | ||
</table> | </table> | ||
| + | |||
| + | ((need display diagram here)) | ||
===&FE00 - Register number=== | ===&FE00 - Register number=== | ||
| + | Writing to &FE00 sets the register that will be accessed through the data register. | ||
| + | The register number is a 5-bit number 0-31, but registers 18 to 30 are reserved. | ||
| + | Register 31 is implemented on some 6845s (but what does it do?). | ||
| + | |||
| + | Some 6845s have a status register that is read at &FE00. | ||
| + | This returns the following information: | ||
| + | * bit 7: always zero | ||
| + | * bit 6: set if there is a strobe input to the ~LPEN signal. It is cleared when either R16 or R17 (Light pen position) is read. | ||
| + | * bit 5: set during the vertical blanking period, when the VerticalCount >= VerticalDisplayed. | ||
| + | * other bits: usually zero, but often random | ||
| + | |||
===&FE01 - Register data=== | ===&FE01 - Register data=== | ||
| + | Using the data register reads or writes to CRTC registers. Registers are normally | ||
| + | written to with the VDU 23,0 API. | ||
| + | |||
| + | Write-only registers return &00. Reserved registers (18 to 31) return &00. | ||
===Register 0 - Horizontal total=== | ===Register 0 - Horizontal total=== | ||
| Line 73: | Line 93: | ||
There are several slightly different versions of the 6845. The BBC series | There are several slightly different versions of the 6845. The BBC series | ||
require a 6845S varient as the VDU drivers depend on certain functionality: | require a 6845S varient as the VDU drivers depend on certain functionality: | ||
| − | * R3 Vertical Sync | + | * R3 Vertical Sync. |
* R6 Vertical Displayed any odd/even value, to set to 25 in MODE 3,6,7. | * R6 Vertical Displayed any odd/even value, to set to 25 in MODE 3,6,7. | ||
| − | * R8 | + | * R8 Character Delay and Cursor Delay timing for MODE 7. |
[[User:Jgharston|Jgharston]] 14:47, 24 December 2007 (UTC) | [[User:Jgharston|Jgharston]] 14:47, 24 December 2007 (UTC) | ||
| − | [[User:Jgharston|Jgharston]] ([[User talk:Jgharston|talk]]) | + | [[User:Jgharston|Jgharston]] ([[User talk:Jgharston|talk]]) 22:43, 15 January 2023 (CET) |
Revision as of 22:43, 15 January 2023
The 6845 CRTC (Cathode Ray Tube Controller) controls how the display is generated. It is written to with VDU 23,0 which also takes account of the current *TV and VDU 23,1 settings. The hardware is directly accessible at &FE00 and &FE01. The 6845 is used in the BBC, Master and System computers. Other display hardware is used on the Atom, Electron, and later computers
Most systems without a hardware 6845 CRTC implement setting the cursor state with registers 10 and 11 via VDU 23;10 and VDU 23;11.
Summary
|
((need display diagram here))
&FE00 - Register number
Writing to &FE00 sets the register that will be accessed through the data register. The register number is a 5-bit number 0-31, but registers 18 to 30 are reserved. Register 31 is implemented on some 6845s (but what does it do?).
Some 6845s have a status register that is read at &FE00. This returns the following information:
- bit 7: always zero
- bit 6: set if there is a strobe input to the ~LPEN signal. It is cleared when either R16 or R17 (Light pen position) is read.
- bit 5: set during the vertical blanking period, when the VerticalCount >= VerticalDisplayed.
- other bits: usually zero, but often random
&FE01 - Register data
Using the data register reads or writes to CRTC registers. Registers are normally written to with the VDU 23,0 API.
Write-only registers return &00. Reserved registers (18 to 31) return &00.
Register 0 - Horizontal total
Register 1 - Horizontal displayed
Register 2 - Horizontal sync position
Register 3 - Sync widths
Register 4 - Vertical total
Register 5 - Vertical total adjust
Register 6 - Vertical displayed
Register 7 - Vertical sync position
Register 8 - Interlace/Display delay/Cursor delay
Register 9 - Scan lines per character
Register 10 - Cursor start line and blink type
Register 11 - Cursor end line
Register 12/13 - Screen start address
Register 14/15 - Cursor position
Register 16/17 - Light pen position
Register 18 - Cursor width
Register 19 -
Register 20 -
Register 31 - Register 31
Extensions
Extensions to the VDU 23,0 interface, or extended hardware, should probably used register numbers 128 upwards.
Hardware differences
There are several slightly different versions of the 6845. The BBC series require a 6845S varient as the VDU drivers depend on certain functionality:
- R3 Vertical Sync.
- R6 Vertical Displayed any odd/even value, to set to 25 in MODE 3,6,7.
- R8 Character Delay and Cursor Delay timing for MODE 7.
Jgharston 14:47, 24 December 2007 (UTC) Jgharston (talk) 22:43, 15 January 2023 (CET)
