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• Multiple CPU language entry
  2 KB (275 words) - 20:12, 8 March 2015
• What CPU is BASIC running on
  Sometimes a program needs to know what CPU the BASIC program is running on, It is a bit fiddly to easily determine the CPU, several tests have to be
  4 KB (610 words) - 15:18, 19 August 2017

Page text matches

• Simple Disassembler
  DEFFNDis_Name(cpu%)="65x02" DEFFNDis_Code(cpu%,Ptr%,Data%):LOCAL op%,ins%,md%,b0%,num%
  3 KB (443 words) - 20:13, 8 March 2015
• BASIC Versions
  '''BBC BASIC (<i>cpu type</i>)'''
  4 KB (557 words) - 01:28, 31 January 2016
• What BASIC is running
  ...esting for a large CPU you can claim less memory than you would on a small CPU
  4 KB (767 words) - 20:42, 24 June 2018
• 6502Em
  <tr><td valign="top"><b>Memory and CPU</b></td><td valign="top">
  1 KB (204 words) - 20:12, 8 March 2015
• 65Dis
  DEFFNDis_Name(cpu%)="65x02" DEFFNDis_Code(cpu%,Ptr%,Data%):LOCAL op%,ins%,md%,b0%,num%
  3 KB (414 words) - 20:12, 8 March 2015
• 65Tube
  <tr><td valign="top"><b>Memory and CPU</b></td><td valign="top"> * 6502 CPU with 64K RAM
  1 KB (220 words) - 20:12, 8 March 2015
• Acorn machines
  6502 CPU card, 1K RAM and hex keypad, LED display, cassette interface on two Eurocard rack systems with combination of cards containing 6502 CPU, 6809
  5 KB (693 words) - 13:39, 17 October 2020
• Address translation
  ...ormation performed by the [[BBC Micro]] to map the address spaces of the [[CPU]] and [[CRTC]] onto the address space of the [[DRAM]] array. * the CPU, video ULA and Teletext chip need for memory to be presented in different w
  10 KB (1,588 words) - 23:22, 6 May 2022
• BeebEm
  <tr><td valign="top"><b>Memory and CPU</b></td><td valign="top">
  3 KB (445 words) - 19:01, 23 January 2019
• CALL
  (if any), sets certain CPU registers to the values of the data that can be run directly by the central processing unit (CPU).
  19 KB (3,040 words) - 15:38, 7 September 2023
• CMOS configuration RAM allocation
  20 b0-b3 ARM CoPro CPU type (JGH ARM Modules) *Config. CPU <cpuname>
  6 KB (716 words) - 00:07, 13 May 2020
• Cycle stretching
  ...eed. In the 68xx and 65xx architectures, which have no wait states, the [[CPU]] clock itself is slowed down to wait for the slow device to respond. ...e cycle may have started in or out of sync with the 1 MHz clock. Once the CPU has been synchronised, the length of each cycle can be predicted by machine
  2 KB (347 words) - 20:12, 8 March 2015
• ElectrEm
  <tr><td valign="top"><b>Memory and CPU</b></td><td valign="top">
  1 KB (256 words) - 20:12, 8 March 2015
• High density floppy disc access
  There are three further constraints from the 6502 CPU and the BBC Micro's ...if out-of-sync with an underlying 1 MHz monotonic clock (1MHzE). Once the CPU is synchronised with this clock the length of later extended cycles can be
  23 KB (3,810 words) - 20:37, 6 October 2019
• IO
  The 2nd proc. only needs the CPU, RAM, a tiny ROM and the Tube ULA.
  3 KB (525 words) - 20:12, 8 March 2015
• Master 128
  === CPU ===
  9 KB (1,381 words) - 14:17, 17 October 2020
• OSBYTE &93
  ...te using STA &FC00,X. As it is an indexed-addressing instruction, the 6502 CPU always<!-- ref name="65xxprog">MOS Technology, Inc. (January 1976), [http:/
  1 KB (199 words) - 14:18, 19 August 2022
• OSBYTE &97
  ...te using STA &FE00,X. As it is an indexed-addressing instruction, the 6502 CPU always<!-- ref name="65xxprog">MOS Technology, Inc. (January 1976), [http:/
  1 KB (199 words) - 14:17, 19 August 2022
• OSBYTE &A4
  for their appropriate CPU value in bits 0..3.
  516 bytes (82 words) - 20:12, 8 March 2015
• OSBYTE &D7
  baud.<ref name="mos125">The CPU actually falls through into the early or continue: if it is set, the CPU loops forever; if clear, the current
  9 KB (1,461 words) - 17:41, 9 November 2021

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