Multiple CPU language entry

From BeebWiki
Jump to: navigation, search


With careful selection of opcodes a ROM's language entry can be made to execute both as 6502 code and in the ROM's destination code. Here are some examples of how to so this.

Z80

         6502 code     Z80 code
8000 18  CLC           JR &8092     ; Z80 jumps to &8092
8001 90  BCC &8002+xx               ; 6502 jumps to &8002+byte at &8002
8002 xx
         6502 code     Z80 code
8000 18  CLC           JR &803A     ; Z80 jumps to &803A
8001 38  SEC
8002 B0  BCS &8050                  ; 6502 jumps to &8050
8003 4C                             ; 6502 entry overlaps service entry
                                    ; which must be &4C

32016

When entering 32016 code, the entry at &8000 is ignored, code is entered at the execution address stored after the Tube transfer address. If the ROM type indicates that there is no Tube transfer address, the execution offset is still used.

8000 .. .. ..                       ; 6502 enters at &8000
8003 .. .. ..                       ; 6502 service entry point
8006 EB cc vv                       ; Type, copyright offset, version
8009 nn nn nn                       ; ROM title
80cc 00 28 43 29 ...                ; Copyright string
80xx 00
80yy rr rr rr rr                    ; Tube transfer address
80zz ee ee ee ee                    ; 32016 execution address offset
                                    ; Code is entered at rrrrrrrr + eeeeeeee

PDP11

As with the 32016, when entering PDP11 code, the entry at &8000 is ignored, code is entered at the execution address stored after the Tube transfer address. If the ROM type byte indicates that there is no Tube transfer address, then code is entered at &8000.

8000 .. .. ..                       ; 6502 enters at &8000
8003 .. .. ..                       ; 6502 service entry point
8006 E7 cc vv                       ; Type, copyright offset, version
8009 nn nn nn                       ; ROM title
80cc 00 28 43 29 ...                ; Copyright string
80xx 00
80yy rr rr rr rr                    ; Tube transfer address
80zz ee ee ee ee                    ; PDP-11 execution address offset
                                    ; Code is entered at rrrrrrrr + eeeeeeee

ARM

See App note: ARM code in sideways ROMs (www.sprow.co.uk)

80186

                        80186 code
8000 E9  SBC #xx        JMP &8002+xx
8001 xx