Difference between revisions of "Writing to EEPROMs"
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− | Writing data to sideways RAM is simply a matter of paging in the sideways RAM bank | + | [[Category:Programming]] |
− | and writing to it. A typical piece of code would be: | + | Writing data to sideways RAM is simply a matter of paging in the sideways |
+ | RAM bank and writing to it. A typical piece of code would be: | ||
LDY #0 | LDY #0 | ||
.loop1 | .loop1 | ||
Line 8: | Line 9: | ||
BIT dst+1:BVC loop1 :\ Loop until dst=&C000 | BIT dst+1:BVC loop1 :\ Loop until dst=&C000 | ||
− | If you are writing to EEPROM (Electrically Erasable Programmable ROM) you need to | + | If you are writing to EEPROM (Electrically Erasable Programmable ROM) |
− | wait for the write cycle to complete by testing that the data has been written. | + | <ref>[http://mdfs.net/Archive/BBCMicro/2008/07/24/144852.htm EEPROM writing in SW rom bank?]</ref> |
− | The simplest way to do this is to just add two more instructions: | + | <ref>[http://www.stardot.org.uk/forums/viewtopic.php?f=3&t=7393 EEPROM - the Holy Grail of Sideways Rom?]</ref> |
+ | <ref>[http://www.stardot.org.uk/forums/viewtopic.php?f=3&t=6280 P.R.E.S. New and Original AP6]</ref> | ||
+ | you need to wait for the write cycle to complete by testing that the data | ||
+ | has been written. The simplest way to do this is to just add two more | ||
+ | instructions: | ||
LDA (src),Y:STA (dst),Y :\ Copy byte to sideways RAM/EEPROM | LDA (src),Y:STA (dst),Y :\ Copy byte to sideways RAM/EEPROM | ||
.loop2 | .loop2 | ||
CMP (dst),Y:BNE loop2 :\ Wait until the byte settles | CMP (dst),Y:BNE loop2 :\ Wait until the byte settles | ||
− | Doing this is inefficent as you have to wait for the write cycle to complete for every | + | Doing this is inefficent as you have to wait for the write cycle to complete |
− | byte. EEPROMs allow you to write in pages of 64 bytes so you only have to wait for the | + | for every byte. EEPROMs allow you to write in pages of 64 bytes so you only |
− | write cycle to complete every 64 bytes. The following code will do this. | + | have to wait for the write cycle to complete every 64 bytes. The following |
+ | code will do this. | ||
LDY #0 | LDY #0 | ||
.loop0 | .loop0 | ||
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BIT dst+1:BVC loop0 :\ Loop until dst=&C000 | BIT dst+1:BVC loop0 :\ Loop until dst=&C000 | ||
− | Note that if the bank is actually ROM the test loop will never exit, so you should | + | Note that if the bank is actually ROM the test loop will never exit, so you |
− | either test the bank before attempting to write to it, or break out of the loop: | + | should either test the bank before attempting to write to it, or break out |
+ | of the loop: | ||
.loop2 | .loop2 | ||
LDA (dst),Y:CMP (dst),Y :\ Test the byte just written | LDA (dst),Y:CMP (dst),Y :\ Test the byte just written | ||
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* [[Testing for sideways RAM]] | * [[Testing for sideways RAM]] | ||
+ | ==References== | ||
+ | <references/> | ||
[[User:Jgharston|Jgharston]] ([[User talk:Jgharston|talk]]) 00:04, 15 February 2016 (UTC) | [[User:Jgharston|Jgharston]] ([[User talk:Jgharston|talk]]) 00:04, 15 February 2016 (UTC) |
Latest revision as of 18:02, 12 November 2017
Writing data to sideways RAM is simply a matter of paging in the sideways RAM bank and writing to it. A typical piece of code would be:
LDY #0 .loop1 LDA (src),Y:STA (dst),Y :\ Copy byte to sideways RAM INY:BNE loop1 :\ Loop for 256 bytes INC src+1:INC dst+1 :\ Increment addresses BIT dst+1:BVC loop1 :\ Loop until dst=&C000
If you are writing to EEPROM (Electrically Erasable Programmable ROM) [1] [2] [3] you need to wait for the write cycle to complete by testing that the data has been written. The simplest way to do this is to just add two more instructions:
LDA (src),Y:STA (dst),Y :\ Copy byte to sideways RAM/EEPROM .loop2 CMP (dst),Y:BNE loop2 :\ Wait until the byte settles
Doing this is inefficent as you have to wait for the write cycle to complete for every byte. EEPROMs allow you to write in pages of 64 bytes so you only have to wait for the write cycle to complete every 64 bytes. The following code will do this.
LDY #0 .loop0 LDX #64 :\ Write 64 bytes at a time .loop1 LDA (src),Y:STA (dst),Y :\ Copy byte to sideways RAM/EEPROM INY:DEX:BNE loop1 :\ Loop for 64 bytes DEY :\ Step back to the last byte written .loop2 CMP (dst),Y:BNE loop2 :\ Wait until the byte settles INY:BNE loop0 :\ Do another 64 bytes until 256 bytes done INC src+1:INC dst+1 :\ Increment addresses BIT dst+1:BVC loop0 :\ Loop until dst=&C000
Note that if the bank is actually ROM the test loop will never exit, so you should either test the bank before attempting to write to it, or break out of the loop:
.loop2 LDA (dst),Y:CMP (dst),Y :\ Test the byte just written BNE loop2 :\ Wait until the byte settles CMP (src),Y:BNE errNotRAM :\ Compare with the source byte INY:BNE loop0 :\ Do another 64 bytes until 256 bytes done