Difference between revisions of "OSBYTE"
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==Specification== | ==Specification== | ||
− | {| cellpadding="0" cellspacing="0" | + | {| cellpadding="0" cellspacing="0" border="1" |
− | | | + | | 6502 || Z80 || 6809 || PDP11 || 80x86 || 32016 || ARM || RISC-V || align="left" | '''On entry:''' || align="left" | '''On exit:''' |
|- align="center" valign="top" | |- align="center" valign="top" | ||
− | | A || A || A || R0 || AL || R1 || R0 || align="left" | = [[OSBYTEs|function code]] || align="left" | preserved, but see [[OSBYTE &83|&83]] and [[OSBYTE &84|&84]]. | + | | A || A || A || R0 || AL || R1 || R0 || A0 || align="left" | = [[OSBYTEs|function code]] || align="left" | preserved, but see [[OSBYTE &83|&83]] and [[OSBYTE &84|&84]]. |
|- align="center" valign="top" | |- align="center" valign="top" | ||
− | | X || L || X || R1 || BX || R2 || R1 || align="left" | = first parameter || align="left" | returned value | + | | X || L || X || R1 || BX || R2 || R1 || A1 || align="left" | = first parameter || align="left" | returned value |
|- align="center" valign="top" | |- align="center" valign="top" | ||
− | | Y || H || Y || R2 || CX || R3 || R2 || align="left" | = second parameter if A>&7F, ignored and forced to &00 if A<&80 || align="left" | returned value if A>&7F | + | | Y || H || Y || R2 || CX || R3 || R2 || A2 || align="left" | = second parameter if A>&7F, ignored and forced to &00 if A<&80 || align="left" | returned value if A>&7F |
|- align="center" valign="top" | |- align="center" valign="top" | ||
− | | Cy|| Cy|| Cy|| Cy || Cy || Cy || Cy || align="left" | || align="left" | returned value if A>&7F | + | | Cy|| Cy|| Cy|| Cy || Cy || Cy || Cy || Cy || align="left" | || align="left" | returned value if A>&7F |
|} | |} | ||
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* 80x86 Entry Address: INT &4B, vectors via 0000:012C | * 80x86 Entry Address: INT &4B, vectors via 0000:012C | ||
* 32000 Entry Address: SVC &06 | * 32000 Entry Address: SVC &06 | ||
− | * | + | * PDP11 Entry Address: EMT 2 |
* ARM Entry Address: SWI &06 "OS_Byte", vector &06 | * ARM Entry Address: SWI &06 "OS_Byte", vector &06 | ||
+ | * RISC-V Entry Address: ECALL &AC0002 | ||
==Implementations== | ==Implementations== |
Revision as of 19:28, 10 September 2023
OSBYTE performs various functions passing and returning up to two bytes of data.
Specification
6502 | Z80 | 6809 | PDP11 | 80x86 | 32016 | ARM | RISC-V | On entry: | On exit: |
A | A | A | R0 | AL | R1 | R0 | A0 | = function code | preserved, but see &83 and &84. |
X | L | X | R1 | BX | R2 | R1 | A1 | = first parameter | returned value |
Y | H | Y | R2 | CX | R3 | R2 | A2 | = second parameter if A>&7F, ignored and forced to &00 if A<&80 | returned value if A>&7F |
Cy | Cy | Cy | Cy | Cy | Cy | Cy | Cy | returned value if A>&7F |
Calling from BBC BASIC
- Escape is acknowledged with OSBYTE &7E
-
=EOF#ch
calls OSBYTE &7F -
ADVAL
calls OSBYTE &80 -
INKEY
calls OSBYTE &81 -
LOAD
,SAVE
,CHAIN
call OSBYTE &82 -
PAGE
is initialised with OSBYTE &83 -
HIMEM
is initialised with OSBYTE &84 -
MODE
calls OSBYTE &82 then OSBYTE &85 -
POS
andVPOS
call OSBYTE &86 -
=MODE
calls OSBYTE &87 - The error handler clears the VDU queue with OSBYTE &DA
Entry points
- BBC BASIC Entry Address: &FFF4
- 6502 Entry Address: &FFF4, vectors via &020A
- Z80 Entry Address: &FFF4, vectors via &FFF5
- 6809 Entry Address: &FFF4, vectors via &FFF5
- 80x86 Entry Address: INT &4B, vectors via 0000:012C
- 32000 Entry Address: SVC &06
- PDP11 Entry Address: EMT 2
- ARM Entry Address: SWI &06 "OS_Byte", vector &06
- RISC-V Entry Address: ECALL &AC0002
Implementations
Any OSBYTE call not recognised by the operating system is passed to sideways ROMs. If no sideways ROM recognises the call, then X is returned set to &FF.
The *FX
command calls OSBYTE and generates the
Bad command error if it is not recognised.
See also
Jgharston 16:58, 6 November 2009 (UTC)