OSWORD &BE

OSBYTE &BE (190) - Disassemble code This call disassembles the supplied data to create a single line of disassembly.

Specification

	On entry:			On exit:
Control block
&00	Send block length (&10)
&01	Receive block length (&20)
&02	CPU number		&02	Number of bytes disassembled
&03	Flags (&00)		&03	Result flags
&04	Address disassembly comes from		&04...	CR-termined string
&08...	Data to be disassembled

You send the routine the address of the disassembly, and also the bytes that are at that address for it to disassemble. Most CPUs have instructions with a maximum length of four bytes, but some have longer instructions, eg the 80x86 has some instructions 6 bytes long. So, you should provide eight bytes (two words) to disassemble. This simplifies the routine so that it does not have to attempt to read the bytes directly from memory itself.

In the returned control block, XY+3 contains the actual number of bytes disassembled, and so is the value by which to increase the address pointer to disassemble the next instruction.

The status byte at XY+2 holds flags about the disassembly:

• If b7=0, it was a valid instruction.
• If b7=1, it could not be disassembled, and the returned text string is the CPU's equivalent of "EQUB &xx".

• If b6=1, then the disassembled instruction terminates a piece of code, such as an unconditional return or jump. The disassembler program can use this bit to print a blank line to clarify listings.

The bottom six bits are used by different disassembly routines for different purposes.

In the entry control block, XY+2 holds the CPU control number:

       0       reserved                44      ARM
       2       6502                    48      80486                   
       8       8008                    58      80586
       9       6809                    65      6502/65C02/6512
       11      pdp11                   68      68x00 series
       12      6512                    80      Z80, Zilog mnemonics
       18      80186                   85      8080/8085, Zilog mnemonics
       28      80286                   86      80x86 series
       30      oggin                   89      INS8900
       32      32016                   94      9440 series
       38      80386                   99      9900
                                               65186

A call with XY+0 set to 8 will return a string at XY+4 holding the name of the processor the routine disassembles. This call can be used to check if a specific disassembly routine is available.

Calling with XY+0 set to 8 also returns a flag in XY+3 with the following information:

• b0-b1: CPU address width, 0=16, 1=24, 2=32
• b2-b3: CPU data width, 0=bytes, 1=16-bit words, 2=32-bit words
• b4: Disassembly base, 0=hex, 1=octal

Examples

Disassembler

A simple disassembly program would be the following:

  10 REM Disassembly test program 1
  20 REM By J.G.Harston
  30 DIM ctrl% 31:X%=ctrl%:Y%=X% DIV 256
  40 INPUT "Address: &"A$:ADDR%=EVAL("&"+A$)
  50 A%=190:REPEAT
  60 !X%=&2010:X?2=80        :REM Z80
  70 X%!4=ADDR%              :REM Address
  80 X%!8=!ADDR%             :REM Data at the address
  90 CALL &FFF1
 100 PRINT;~ADDR%;" ";
 110 FOR Z%=ADDR% TO ADDR%+X%?3-1
 120 PRINT;~?Z%;" ";:NEXT
 130 PRINTTAB(20);$(X%+4):IF(X%?2AND64):PRINT
 140 ADDR%=ADDR%+X%?3
 150 UNTIL0

CPU Name

The following code tests to see if a specific disassembly routine exists and returns its name or a null sting if no disassembly code is available.

   DEFFNDis_Name(cpu%)
   !X%=&2008:X%?2=cpu%:X%!4=0:A%=190:CALL &FFF1
   IF X%!4 THEN =$(X%+4) ELSE =""

CPU Details

6502 (cpu 2)

The 6502 disassembly routine (type number 2) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is RTS, RTI or JMP
• b5-0: unused, zero

6809 (cpu 9)

The 6809 disassembly routine (type number 9) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is unconditional jump
• b5-0: unused, zero

PDP-11 (cpu 11)

The PDP-11 disassembly routine (type number 11) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is RTS, RTI or JMP
• b5-0: unused, zero

65C12 (cpu 12)

The 65C12 disassembly routine (type number 12) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is RTS, RTI, JMP or BRA
• b5-1: unused, zero
• b0: Instruction specific to 65C12

The 65C12 disassembly routine recognises the extra instructions on the 65C12.

Oggin (cpu 30)

The oggin disassembly routine (type number 30) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is RET or JMP
• b5-1: unused, zero
• b0: extended oggin instruction set

For further information, see "An Introduction to the oggin machine", David Budgen, University of Stirling Computing Science Department .

32000 (cpu 32)

The PDP-11 disassembly routine (type number 11) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is RTS, RTI or JMP
• b5-0: unused, zero

ARM (cpu 44)

The ARM disassembly routine (type number 44) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is unconditional jump
• b5-0: unused, zero

6502 Series (cpu 65)

The generic 6502 series disassembly routine (type number 65) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is RTS, RTI, JMP or BRA
• b5-2: unused, zero
• b1: instruction specific to Rockwell R65C02
• b0: instruction specific to 65C12

The generic 6502 series disassembly routine recognises the extra instructions on the 65C12 and the extra instructions on the Rockwell R65C02.

Z80 (cpu 80)

The Z80 disassembly routine (type number 80) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is unconditional RET, JP or JR
• b5-b2: unused, zero
• b1: Instruction not on the 8080/8085
• b0: Undocumented instruction

The Z80 disassembly routine recognises the undocumented instructions using the index registers as 8-bit register pairs, labelling them IXL, IXH, IYL and IYH, and the Shift Left and Set instructions CB30 to CB38.

8080/8085 (cpu 85)

The 8080/8085 disassembly routine (type number 85) returns the following information in the status byte:

• b7: could not be disassembled
• b6: instruction is unconditional RET or JP
• b5-b0: unused, zero

References

Jgharston 15:20, 25 May 2009 (UTC)