Difference between revisions of "OSCLI"
(Corrected entry registers) |
m (Added 68000.) |
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==Specification== | ==Specification== | ||
{| cellpadding="0" cellspacing="0" border="1" | {| cellpadding="0" cellspacing="0" border="1" | ||
| − | | 6502 || Z80 || 6809 || PDP11 || 80x86 || 32016 || ARM || RISC-V || align="left" | '''On entry:''' || align="left" | '''On exit:''' | + | | 6502 || Z80 || 6809 || PDP11 || 80x86 || 32016 || ARM || 68000 || RISC-V || align="left" | '''On entry:''' || align="left" | '''On exit:''' |
|- align="center" valign="top" | |- align="center" valign="top" | ||
| − | | YX || HL || X || R0 || BX || R1 || R0 || A0 || align="left" | => command string, terminated with CR || align="left" | undefined | + | | YX || HL || X || R0 || BX || R1 || R0 || D0 || A0 || align="left" | => command string, terminated with CR || align="left" | undefined |
|} | |} | ||
| Line 22: | Line 22: | ||
* PDP11 Entry Address: EMT 1 | * PDP11 Entry Address: EMT 1 | ||
* ARM Entry Address: SWI &06 "OS_CLI", vector &05 | * ARM Entry Address: SWI &06 "OS_CLI", vector &05 | ||
| + | * 68000 Entry Address: MOV #&06,A0:TRAP 12 | ||
* RISC-V Entry Address: ECALL &AC0001 | * RISC-V Entry Address: ECALL &AC0001 | ||
[[User:Jgharston|Jgharston]] ([[User talk:Jgharston|talk]]) 20:33, 10 September 2023 (CEST) | [[User:Jgharston|Jgharston]] ([[User talk:Jgharston|talk]]) 20:33, 10 September 2023 (CEST) | ||
Latest revision as of 21:14, 17 September 2023
OSCLI passes a command to the MOS, ROMs and filing system to execute.
Specification
| 6502 | Z80 | 6809 | PDP11 | 80x86 | 32016 | ARM | 68000 | RISC-V | On entry: | On exit: |
| YX | HL | X | R0 | BX | R1 | R0 | D0 | A0 | => command string, terminated with CR | undefined |
Calling from BBC BASIC
- OSCLI and inline *commands call OSCLI
Entry points
- BBC BASIC Entry Address: &FFF7
- 6502 Entry Address: &FFF7, vectors via &0208
- Z80 Entry Address: &FFF7, vectors via &FFF8
- 6809 Entry Address: &FFF7, vectors via &FFF8
- 80x86 Entry Address: INT &4c, vectors via 0000:0130
- 32000 Entry Address: SVC &08
- PDP11 Entry Address: EMT 1
- ARM Entry Address: SWI &06 "OS_CLI", vector &05
- 68000 Entry Address: MOV #&06,A0:TRAP 12
- RISC-V Entry Address: ECALL &AC0001
